Battery Enclosure, Busbar, and Insulation Design for ONYX RCR

This article examines physical battery-pack design within the ONYX RCR 72V battery-bay form factor. The electrical-performance analysis remains in ONYX Battery Design.

Design Example and Evidence Limits

The described 20s9p, 180-cell tabless 21700 design targets about 45Ah and 300A continuous current within the example enclosure dimensions. These are the source’s design targets and dimensions, not proof of a completed pack’s continuous rating. The “must support” language below defines the design requirement, not a validated outcome.

The source does not supply complete busbar thicknesses, weld specifications, derating calculations, or measured sustained-load results. None are inferred here. This is design analysis, not a step-by-step fabrication recipe. Cell-level specifications do not certify the entire pack, BMS, wiring, connector, insulation, or enclosure.

Design Constraints

• Must fit ONYX RCR 72V battery bay
• Must support 300A continuous current
• Must use tabless cylindrical cells only
• Must remain electrically stable under sustained load
• Must not rely on peak-only current ratings

These constraints are non-negotiable and define the design space.

These constraints eliminate most theoretical designs before they are ever built.

Every improvement in one part of the pack introduces a constraint in another.

System Overview

This post is primarily a system-level analysis of high-current battery design within the ONYX RCR platform.

However, where necessary, it uses a concrete design example to illustrate real constraints and tradeoffs.

That reference design is:

• a custom 20s9p tabless 21700 pack
• targeting ~45Ah capacity
• designed around a slightly increased enclosure height

This example is not the only valid configuration.

It is used to make constraints visible:

• how enclosure volume affects parallel count
• how interconnect space competes with capacity
• how thermal and electrical limits emerge in real layouts

All principles in this post apply generally.

The 20s9p configuration is used to show how those principles play out in a real design.

These values describe the target configuration, not guaranteed performance.

Most packs that claim high current capability do not sustain it under real load conditions.

Enclosure as the Primary Constraint

The battery is defined by the enclosure, not the cells.

The metal enclosure determines:

• maximum internal volume
• layout constraints
• structural integrity
• safety and containment
• thermal behavior

The enclosure is part of the system, not a container.

Structural Stability

• prevents movement under load
• maintains alignment
• reduces weld stress

Safety and Protection

• impact resistance
• containment of failure
• isolation from external damage

Thermal Behavior

• spreads heat
• may trap heat if poorly designed

Carrying and Integration

• mounting
• weight distribution
• structural support

System Constraint

All internal design must conform to the enclosure.

The enclosure defines not only what fits, but how current and heat are distributed throughout the system.

If a design does not fit within the enclosure, it does not exist as a viable system.

Busbars and Interconnect Strategy

At 300A, interconnect design becomes a primary constraint.

Nickel-only interconnects are not viable at this current level.

Nickel strip alone introduces:

• excessive resistance
• heat buildup
• voltage drop across the pack

At this level, interconnect design is primarily a material problem.

• Copper provides low resistance and efficient current flow
• Nickel provides reliable weldability but significantly higher resistance

These are not interchangeable.

In high-performance designs, the current path is typically divided:

• copper used for primary conduction
• nickel or nickel-plated surfaces used only at the cell interface

Nickel-plated copper combines both:

• copper core for conductivity
• nickel surface for weldability

This allows low-resistance current flow while maintaining consistent weld quality.

Pure nickel interconnects, even when thickened, introduce significantly higher resistance and become a limiting factor under sustained high current.

Poor interconnect design results in:

• localized heating
• efficiency loss
• premature failure

Interconnect resistance is a primary contributor to voltage sag under load.

Poor busbar design increases:

• voltage drop
• heat generation
• instability under sustained current

Sag is not only a cell characteristic. It is strongly influenced by interconnect design.

As current increases, interconnect design scales from a secondary concern to a primary system constraint.

Interconnect design directly determines how efficiently current moves through the pack.

This is where many high-current claims stop being real under load.

At this level, interconnect design is often the difference between a pack that meets its specifications and one that actually performs under load.

Wiring and Output Path

Current leaving the pack must pass through:

• internal wiring
• output leads
• connectors

Each introduces resistance.

Key considerations:

• wire gauge must match sustained current
• connector choice impacts voltage drop
• connection quality affects heat generation

At this level, small inefficiencies become system-level losses.

At this current level, wiring resistance can equal or exceed interconnect resistance if not properly sized.

Undersized wiring behaves like a resistor in series with the pack.

Poor wiring introduces voltage drop before power reaches the controller.

Assembly Method

Construction directly affects electrical performance, resistance, and long-term reliability.

Every weld and connection is part of the electrical path.

At this level, assembly is not just mechanical. It defines how current flows through the pack.

Key elements:

• consistent weld quality and penetration
• proper insulation (fish paper, kapton, terminal isolation)
• mechanical stability under vibration and load
• controlled compression where applicable
• rigid metal enclosure acting as the structural shell

Spot welding is required for reliable connections at this scale.

Poor welds introduce resistance at every connection point, which compounds across the pack under load.

Mechanical instability leads to:

• weld fatigue
• micro-movement between cells
• increasing resistance over time

The enclosure is part of the structure, not just a container.

A rigid metal enclosure:

• prevents pack flex under load
• maintains alignment of parallel groups
• protects against vibration and impact
• supports consistent compression across the pack

Improper enclosure design results in:

• shifting cell groups
• stressed interconnects
• uneven pressure distribution
• long-term reliability issues

Improper insulation results in:

• short risk
• localized heating
• long-term degradation

Assembly quality determines:

• total pack resistance
• thermal behavior under load
• consistency between parallel groups
• overall failure risk

Assembly errors are cumulative and scale across the entire pack under load.

Enclosure, Internal Volume, and Material Stack

The battery is defined by the enclosure, not the cells.

The enclosure does not just determine what fits. It determines how current flows, how heat accumulates, and where the system will fail.

This design uses an expanded internal volume of approximately:

• 14.0 x 7.4 x 6.2 inches

The increased height is intentional.

It allows a 20s9p configuration (~45Ah using 21700 5Ah cells) without forcing compromises in:

• interconnect design
• thermal behavior
• wiring and BMS placement
• structural stability

This volume is not allocated to cells alone. It is shared between:

• cells (capacity)
• conductors (current capability)
• insulation (safety)
• wiring and BMS (control and output)
• structure and compression
• thermal mass and heat distribution

Every one of these consumes space and contributes resistance.

The enclosure defines the performance ceiling of the system.

Packaging efficiency is not just mechanical. It is electrical.

If capacity is increased within a fixed volume, something else must be reduced:

• conductor cross-section
• spacing and thermal margin
• insulation thickness
• or structural stability

Those reductions increase resistance and heat.

In this design, enclosure volume is increased to avoid those compromises rather than compressing them into a fixed space.

You cannot maximize:

• capacity
• current capability
• thermal stability
• compactness

at the same time.

The enclosure determines which of these are prioritized.

Cell Packing

Using tabless 21700 cells such as the Tenpower 50XG:

• Diameter: ~21.5 mm
• Length: ~70.5 mm

A 20s9p configuration requires:

• 180 total cells
• tightly controlled packing
• deliberate allocation of space for current paths and insulation

Increasing parallel count improves:

• current distribution
• voltage stability under load
• per-cell stress

But increasing density also increases:

• thermal coupling
• resistance sensitivity
• routing complexity

The additional enclosure height allows higher parallel count without collapsing spacing for conductors and insulation.

The highest capacity configuration that fits is not the highest performing configuration under load.

Performance depends on how current moves through the pack, not how tightly it is packed.

Busbar Material and Interconnect Strategy

At 300A class current, interconnect design defines system performance.

Material choice is the primary driver of resistance.

• Copper provides the lowest resistance and best current handling
• Nickel provides reliable weldability but significantly higher resistance

These are not interchangeable.

Increasing nickel thickness improves current handling, but does not approach the conductivity of copper. At this level, resistance is a material limitation before it is a geometric one.

For high-performance packs, the current path is typically split:

• copper used for primary conduction
• nickel or nickel-plated surfaces used only at the cell interface

This approach allows:

• low-resistance current flow through copper
• consistent weld quality at the cell

Nickel-plated copper combines both:

• copper core for conductivity
• nickel surface for weldability

This is often the most effective solution where direct copper welding is not practical.

Direct copper-to-cell welding is possible, but requires more advanced equipment and tighter process control. It is not the baseline assumption for most builds.

Thickness and Geometry

Conductor thickness and width determine:

• voltage drop
• heat generation
• current distribution

Increasing cross-sectional area reduces resistance, but consumes internal volume.

That volume competes with:

• additional cells (capacity)
• insulation and spacing (thermal stability)

In constrained enclosures, interconnects are often reduced to fit available space. This increases resistance and heat under load.

In this design, increased enclosure height allows:

• proper conductor sizing
• improved current distribution
• reduced voltage drop

without sacrificing parallel count or insulation.

System Impact

Interconnect design directly affects:

• voltage sag under load
• thermal behavior
• current balance across parallel groups

Poor interconnect design results in:

• localized heating
• uneven current distribution
• reduced usable power

At this level, the limitation is no longer the cell.

It is how effectively current can move between cells and out of the pack.

Positive and Negative Paths

Current does not distribute evenly by default.

It follows the lowest resistance path.

Both positive and negative paths must be treated as identical systems:

• equal cross-section
• similar length
• consistent material

Imbalance creates:

• uneven current distribution
• localized heating
• asymmetric voltage drop

These effects compound under sustained load.

Path design determines whether parallel groups actually share load evenly.

Insulation Stack

Insulation occupies fixed and limited volume within the enclosure.

• fish paper
• insulating rings
• kapton
• structural wrapping

This volume is not optional and cannot be reduced without consequence.

Insulation competes directly with:

• conductor cross-section
• wiring paths
• thermal spacing

Reducing insulation to gain space increases:

• short risk under vibration or compression
• localized heating due to reduced separation
• long-term degradation from material breakdown

Increasing insulation improves safety margins, but reduces available space for:

• current paths
• parallel group layout
• heat dissipation

Insulation also affects how heat is retained and distributed within the pack. Tighter insulation and reduced spacing increase thermal coupling between cells and interconnects.

At high current, this accelerates temperature rise and amplifies resistance under load.

Insulation must also maintain integrity under:

• compression
• vibration
• thermal cycling

Failure is often not immediate. It develops over time as materials shift, wear, or degrade.

Insulation is not just a safety layer.

It is a structural, thermal, and spatial constraint that directly affects reliability and performance under load.

Wiring and Output

At 300A class current, wiring is part of the primary resistance path, not a secondary detail.

• 4 AWG preferred
• 6 AWG minimum for short runs

All current leaving the pack must pass through this path.

Resistance is determined by:

• length
• routing geometry
• termination quality
• connection interfaces

Even small increases in resistance at this stage result in:

• measurable voltage drop
• heat generation at exit points
• reduced usable power under load

Wiring is often one of the most constrained parts of the system due to limited space within the enclosure.

Routing decisions directly affect:

• path length
• bend radius
• mechanical stress
• thermal concentration

Poor routing introduces:

• unnecessary resistance through longer paths
• localized heating at bends and terminations
• fatigue at connection points under vibration

Terminations are critical failure points.

Poor crimps or connections increase resistance and create localized hotspots that worsen under sustained load.

Wiring must be designed as part of the current path from the beginning.

If wiring is treated as an afterthought, it becomes a bottleneck regardless of cell or interconnect quality.

Connectors

The connector is the final restriction in the discharge path.

All current leaving the pack must pass through this interface.

At this level:

• QS9 and QS10 class connectors are appropriate for high-current applications

Connector selection directly affects:

• voltage drop
• heat generation at the interface
• sustained current capability

Connector limitations include:

• contact resistance
• contact surface area
• internal conductor size
• thermal behavior under sustained load

Even with proper internal design, a connector with insufficient capacity will:

• introduce additional resistance
• generate heat at the output
• limit usable power under load

Dual Output Strategy

Single connectors concentrate all current through one interface.

At higher current levels, this increases:

• contact resistance load
• thermal concentration
• risk of connector heating and degradation

Dual output configurations distribute current across two paths:

• reduced current per connector
• lower interface resistance per path
• improved thermal behavior

This can be implemented as:

• dual connectors
• split output leads

However, this introduces additional complexity:

• balanced current distribution between paths
• increased wiring and routing requirements
• more connection points (additional failure surfaces)

Placement and System Impact

Connector placement must be considered as part of the enclosure layout.

It competes for space with:

• wiring paths
• busbars
• structural elements

Poor placement increases:

• wiring length
• routing complexity
• resistance and heat

At this level, the connector is not just an interface.

It is part of the current path and can become the system bottleneck if not properly sized and integrated.

BMS Volume and Placement

The BMS is part of the current path, not just a control system.

All discharge current flows through it.

This makes the BMS one of the most critical sources of:

• resistance
• voltage drop
• heat generation

A 400A-class BMS does not guarantee stable operation at 300A.

Real performance is limited by:

• internal trace and bus resistance
• MOSFET characteristics
• thermal handling under sustained load

The BMS introduces a concentrated point of resistance within the system.

Volume and Integration

A high-current BMS requires space for:

• current-carrying paths
• balance leads
• main leads
• insulation clearance

This volume competes directly with:

• cell packing
• busbar routing
• wiring paths

If insufficient space is allocated, compromises occur in:

• wire routing
• conductor size
• thermal exposure

The BMS must be designed into the layout from the beginning.

Placement and Routing Impact

BMS placement directly affects:

• wiring length
• path resistance
• thermal behavior

Poor placement results in:

• longer current paths
• increased resistance
• additional heat under load

Placing the BMS in high-heat zones compounds the problem:

• elevated temperatures increase resistance
• thermal throttling may occur
• failure risk increases over time

System Limitation

Even with strong cells and low-resistance interconnects, the BMS can become the primary bottleneck.

Common failure behaviors include:

• voltage drop across the BMS under load
• heat-induced performance loss
• sudden cutoff at sustained current

At this level, the question is not the BMS rating.

It is whether the BMS can sustain current without becoming the highest-resistance component in the system.

Mechanical Stability

Mechanical stability directly affects electrical performance.

Movement under load causes:

• weld fatigue
• increasing resistance
• long-term degradation

Controlled compression improves:

• contact reliability
• structural integrity

The enclosure acts as a structural component, not just a shell.

A mechanically unstable pack becomes electrically unstable over time.

Thermal Behavior

Heat is generated wherever resistance exists:

• cells
• interconnects
• BMS
• wiring
• connectors

Higher density increases:

• heat retention
• thermal coupling
• risk of localized saturation

Thermal behavior is a function of:

• resistance distribution
• material selection
• packing density

A pack that cannot dissipate heat cannot sustain high current.

Temperature rise increases resistance, which increases heat.

This feedback loop defines real performance limits.

System Constraint

Within the enclosure, nothing is free.

• every material consumes space
• every connection adds resistance
• every path generates heat

These are not independent factors. They compound under load.

The pack does not perform based on its specifications.

It performs based on:

• total system resistance
• how evenly current is distributed
• how effectively heat is managed within that volume

As current increases, small inefficiencies scale into:

• measurable voltage drop
• localized heating
• reduced usable power

The enclosure defines the boundary within which all of these effects interact.

You cannot optimize one dimension without impacting the others.

Increasing capacity affects:

• available space for conductors
• thermal behavior
• current distribution

Improving current paths affects:

• available space for cells
• packing density

Managing heat affects:

• spacing
• material choices
• structural design

Every decision inside the enclosure is a tradeoff between:

• resistance
• heat
• space

The pack performs as well as the balance between these constraints, not the maximum of any single one.

Related Articles

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